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  lc 2 mos precision mini-dip analog switch adg419 rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2009 analog devices, inc. all rights reserved. features 44 v supply maximum ratings v ss to v dd analog signal range low on resistance: <35 ultralow power dissipation: < 35 w fast transition time: 160 ns maximum break-before-make switching action plug-in replacement for dg419 applications precision test equipment precision instrumentation battery-powered systems sample hold systems functional block diagram adg419 d switch shown for a logic 1 input s 1 s2 in 0 7850-001 figure 1. general description the adg419 is a monolithic cmos spdt switch. this switch is designed on an enhanced lc 2 mos process that provides low power dissipation yet gives high switching speed, low on resistance, and low leakage currents. the on resistance profile of the adg419 is very flat over the full analog input range, ensuring excellent linearity and low distortion. the part also exhibits high switching speed and high signal bandwidth. cmos construction ensures ultralow power dissipation, making the parts ideally suited for portable and battery-powered instruments. each switch of the adg419 conducts equally well in both directions when on and has an input signal range that extends to the supplies. in the off condition, signal levels up to the supplies are blocked. the adg419 exhibits break-before-make switching action. product highlights 1. extended signal range. the adg419 is fabricated on an enhanced lc 2 mos process, giving an increased signal range that extends to the supply rails. 2. ultralow power dissipation. 3. low r on . 4. single-supply operation. for applications where the analog signal is unipolar, the adg419 can be operated from a single rail power supply. the part is fully specified with a single 12 v power supply and remains functional with single supplies as low as 5 v.
adg419 rev. b | page 2 of 16 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? functional block diagram .............................................................. 1 ? general description ......................................................................... 1 ? product highlights ........................................................................... 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? dual supply ................................................................................... 3 ? single supply ................................................................................. 4 ? absolute maximum ratings ............................................................5 ? esd caution...................................................................................5 ? pin configuration and function descriptions ..............................6 ? typical performance characteristics ..............................................7 ? test circuits ........................................................................................9 ? terminology .................................................................................... 11 ? outline dimensions ....................................................................... 12 ? ordering guide .......................................................................... 13 ? revision history 8/09rev. b to rev. c updated format .................................................................. universal changes to table 1 ............................................................................ 3 changes to table 2 ............................................................................ 4 updated outline dimensions ....................................................... 12 changes to ordering guide .......................................................... 13
adg419 rev. b | page 3 of 16 specifications dual supply v dd = 15 v 10%, v ss = ?15 v 10%, v l = 5 v 10%, gnd = 0 v, unless otherwise noted. table 1. b version t version parameter 1 +25c ?40c to +85c ?40c to +125c +25c ?55c to +125c unit test conditions/comments analog switch analog signal range v ss to v dd v ss to v dd r on 25 25 typ v d = 12.5 v, i s = ?10 ma 35 45 45 35 45 max v dd = +13.5 v, v ss = ?13.5 v leakage currents v dd = +16.5 v, v ss = ?16.5 v source off leakage, i s (off ) 0.1 0.1 na typ v d = 15.5 v, v s = ? 15.5 v; see figure 12 0.25 5 15 0.25 15 na max drain off leakage, i d (off ) 0.1 0.1 na typ v d = 15.5 v, v s = ? 15.5 v; see figure 12 0.75 5 30 0.75 30 na max channel on leakage, i d , i s (on) 0.4 0.4 na typ v s = v d = 15.5 v; see figure 13 0.75 5 30 0.75 30 na max digital inputs input high voltage, v inh 2.4 2.4 2.4 v min input low voltage, v inl 0.8 0.8 0.8 v max input current i inl or i inh 0.005 0.005 0.005 a typ v in = v inl or v inh 0.5 0.5 0.5 a max dynamic characteristics 2 t transition 160 200 200 145 200 ns max r l = 300 , c l = 35 pf; v s1 = 10 v, v s2 = ? 10 v; see figure 14 break-before-make time delay, t d 30 30 ns typ r l = 300 , c l = 35 pf; v s1 = v s2 = 10 v; see figure 15 5 5 ns min off isolation 80 80 db typ r l = 50 , f = 1 mhz; see figure 16 channel-to-channel crosstalk 90 70 db typ r l = 50 , f = 1 mhz; see figure 17 c s (off ) 6 6 pf typ f = 1 mhz c d , c s (on) 55 55 pf typ f = 1 mhz power requirements v dd = +16.5 v, v ss = ?16.5 v i dd 0.0001 0.0001 a typ v in = 0 v or 5 v 1 2.5 2.5 1 2.5 a max i ss 0.0001 0.0001 a typ 1 2.5 2.5 1 2.5 a max i l 0.0001 0.0001 a typ v l = 5.5 v 1 2.5 2.5 1 2.5 a max 1 temperature ranges are as foll ows: b version: ?40c to +125c; t version: ?55c to +125c. 2 guaranteed by design, not subject to production test.
adg419 rev. b | page 4 of 16 single supply v dd = 12 v 10%, v ss = 0 v, v l = 5 v 10%, gnd = 0 v, unless otherwise noted. table 2. b version t version parameter 1 +25c ?40c to +85c ?40c to +125c +25c ?55c to +125c unit test conditions/comments analog switch analog signal range 0 to v dd 0 to v dd v r on 40 40 typ v d = 3 v, 8.5 v, i s = ?10 ma 60 70 70 max v dd = 10.8 v leakage current v dd = 13.2 v source off leakage, i s (off ) 0.1 0.1 na typ v d = 12.2 v/1 v, v s = 1 v/12.2 v; see figure 12 0.25 5 15 0.25 15 na max drain off leakage, i d (off ) 0.1 0.1 na typ v d = 12.2 v/1 v, v s = 1 v/12.2 v; see figure 12 0.75 5 30 0.75 30 na max channel on leakage, i d , i s (on) 0.4 0.4 na typ v s = v d = 12.2 v/1 v; see figure 13 0.75 5 30 0.75 30 na max digital inputs input high voltage, v inh 2.4 2.4 2.4 v min input low voltage, v inl 0.8 0.8 0.8 v max input current i inl or i inh 0.005 0.005 0.005 a typ v in = v inl or v inh 0.5 0.5 0.5 a max dynamic characteristics 2 t transition 180 250 250 170 250 ns max r l = 300 , c l = 35 pf; v s1 = 0 v/8 v, v s2 = 8 v/0 v; see figure 14 break-before-make time delay, t d 60 60 ns typ r l = 300 , c l = 35 pf; v s1 = v s2 = 8 v; see figure 15 off isolation 80 80 db typ r l = 50 , f = 1 mhz; see figure 16 channel-to-channel crosstalk 90 70 db typ r l = 50 , f = 1 mhz; see figure 17 c s (off ) 13 13 pf typ f = 1 mhz c d , c s (on) 65 65 pf typ f = 1 mhz power requirements v dd = 13.2 v i dd 0.0001 0.0001 a typ v in = 0 v or 5 v 1 2.5 2.5 1 2.5 a max i l 0.0001 0.0001 a typ v l = 5.5 v 1 2.5 2.5 1 2.5 a max 1 temperature ranges are as foll ows: b version: ?40c to +125c; t version: ?55c to +125c. 2 guaranteed by design, not subject to production test.
adg419 rev. b | page 5 of 16 absolute maximum ratings t a = 25c unless otherwise noted. table 3. parameter rating v dd to v ss 44 v v dd to gnd ?0.3 v to +25 v v ss to gnd +0.3 v to ?25 v v l to gnd ?0.3 v to v dd + 0.3 v analog, digital inputs 1 v ss ? 2 v to v dd + 2 v or 30 ma, whichever occurs first continuous current, s or d 30 ma peak current, s or d (pulsed at 1 ms, 10% duty-cycle maximum) 100 ma operating temperature range industrial (b version) ?40c to +125c extended (t version) ?55c to +125c storage temperature range ?65c to +150c junction temperature 150c cerdip package, power dissipation 600 mw ja , thermal impedance 110c/w lead temperature, soldering (10 sec) 300c pdip package, power dissipation 400 mw ja , thermal impedance 100c/w lead temperature, soldering (10 sec) 260c soic package, power dissipation 400 mw ja , thermal impedance 155c/w msop package, power dissipation 315 mw ja , thermal impedance 205c/w lead temperature, soldering vapor phase (60 sec) 215c infrared (15 sec) 220c 1 overvoltages at in, s or d is clamped by internal diodes. limit current to the maximum ratings given. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution
adg419 rev. b | page 6 of 16 pin configuration and fu nction descriptions 8 7 6 5 1 2 3 4 d s1 g nd s2 in adg419 top view (not to scale) v dd v l v ss 07850-002 figure 2. pin configuration table 4. pin function description pin no. neonic description 1 d drain terminal. may be an input or an output. 2 s1 source terminal. may be an input or an output. 3 gnd ground (0 v) reference. 4 v dd most positive power supply potential. 5 v l logic power supply (5 v). 6 in logic control input. 7 v ss most negative power supply potential in dual-supply applications. in single-supply applications, it may be connected to gnd. 8 s2 source terminal. may be an input or an output. table 5. truth table loic sitch 1 sitch 2 0 on off 1 off on
adg419 rev. b | page 7 of 16 typical performance characteristics 50 40 30 20 10 0 ?15 ?10 ?5 0 5 10 15 r on ( ? ) v s , v d (v) v dd = +5v v ss = ?5v v dd = +10v v ss = ?10v v dd = +12v v ss = ?12v v dd = +15v v ss = ?15v t a = 25c 07850-003 figure 3. r on as a function of v d (v s ), dual-supply voltage 50 0 10 20 30 40 ?15 ?10 ?5 0 5 10 15 r on ( ? ) v s , v d (v) v dd = +15v v ss = ?15v v l = +5v 125c 25c 85c 07850-004 figure 4. r on as a function of v d (v s ) for different temperatures 0.02 ?0.03 ?0.02 ?0.01 0 0.01 leakage current (na) v s , v d (v) ?15 ?10 ?5 0 5 10 15 v dd = +15v v ss = ?15v t a = 25c i d (on) i s (off) i d (off) 07850-005 figure 5. leakage currents as a function of v s (v d ) 100 0 20 40 60 80 01 10 5 r on ( ? ) v s , v d (v) 5 v dd = 5v v ss = 0v t a = 25c v dd = 10v v ss = 0v v dd = 12v v ss = 0v v dd = 15v v ss = 0v 07850-006 figure 6. r on as a function of v d (v s ), single-supply voltage 100 0 20 40 60 80 0369 r on ( ? ) v s , v d (v) 1 2 125c 25c 85c v dd = 12v v ss = 0v v l = 5v 07850-007 figure 7. r on as a function of v d (v s ) for different temperatures 0.006 ?0.004 ?0.002 0 0.002 0.004 leakage current (na) v s , v d (v) 02468101 2 v dd = 12v v ss = 0v t a = 25c i d (on) i s (off) i d (off) 07850-008 figure 8. leakage currents as a function of v s (v d )
adg419 rev. b | page 8 of 16 10m a 1ma 100a 1na 10na 100na 1a 10a 100 1k 10k 100k 1m 10m i supply frequency (hz) v dd = +15v v ss = ?15v v l = +5v i+, i? i l 07850-009 figure 9. supply current (i supply ) vs. input switching frequency 220 200 80 100 120 140 160 180 61 14 12 10 8 t transition (ns) supply voltage (v) 6 single supply v in = 0v/+5v dual supply v in = 5v 07850-010 figure 10. transition time (t transition ) vs. power supply voltage
adg419 rev. b | page 9 of 16 test circuits s r on = v 1 /i ds v s i ds d v1 07850-011 figure 11. on resistance v s v d i s (off) i d (off) sd aa 07850-012 figure 12. off leakage v s v d i d (on) sd a 07850-013 figure 13. on leakage v s1 v out t transition t transition v in v s2 v in r l 300? c l 35pf v ss +15 v s2 in gnd ?15v d v l v dd s1 3v 0v 50% 50% 90% 90% output 07850-014 +5 v figure 14. transition time, t transition v s1 v out v out t d t d address drive (v in ) v s2 0.9v o 0.9v o 0.9v o v in r l 300 ? c l 35pf v ss +15 v s2 in gnd ?15v d v l v dd s1 3v 0v 0.9v o 0 7850-015 +5 v figure 15. break-before-make time delay, t d
adg419 rev. b | page 10 of 16 v out v s v in v dd v ss v l 0.1f 0.1f 0.1f r l 50 ? in gnd ?15v d s +15 v +5 v 07850-016 figure 16. off isolation v out v s v in r l v dd v ss v l ?15v 0.1f 0.1f 0.1f gnd d s1 s2 channel-to-channel crosstalk = 20 log | v s /v out | +15 v +5 v 50 ? 50 ? 07850-017 figure 17. crosstalk
adg419 rev. b | page 11 of 16 terminology v dd most positive power supply potential. v ss most negative power supply potential in dual-supply applications. in single-supply applications, it may be connected to gnd. v l logic power supply (5 v). gnd ground (0 v) reference. s source terminal. may be an input or an output. d drain terminal. may be an input or an output. in logic control input. r on ohmic resistance between d and s. i s (off) source leakage current with the switch off. i d (off) drain leakage current with the switch off. i d , i s (on) channel leakage current with the switch on. v d (v s ) analog voltage on terminals d, s. c s (off) off switch source capacitance. c d , c s (on) on switch capacitance. t transition delay time between the 50% and 90% points of the digital inputs and the switch on condition when switching from one address state to another. t d off time or on time measured between the 90% points of both switches when switching from one address state to the other. v inl maximum input voltage for logic 0. v inh minimum input voltage for logic 1. i inl (i inh ) input current of the digital input. crosstalk a measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. off isolation a measure of unwanted signal coupling through an off channel. i dd positive supply current. i ss negative supply current.
adg419 rev. b | page 12 of 16 outline dimensions compliant to jedec standards ms-001 controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. corner leads may be configured as whole or half leads. 070606-a 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) seating plane 0.015 (0.38) min 0.210 (5.33) max 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) 8 1 4 5 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.100 (2.54) bsc 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 0.060 (1.52) max 0.430 (10.92) max 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) gauge plane 0.005 (0.13) min figure 18. 8-lead plastic dual in-line package [pdip] narrow body (n-8) dimensions shown in inches and (millimeters) controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. 0.310 (7.87) 0.220 (5.59) 0.005 (0.13) min 0.055 (1.40) max 0.100 (2.54) bsc 15 0 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) seating plane 0.200 (5.08) max 0.405 (10.29) max 0.150 (3.81) min 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.070 (1.78) 0.030 (0.76) 0.060 (1.52) 0.015 (0.38) 14 5 8 figure 19. 8-lead ceramic dual in-line package [cerdip] (q-8) dimensions shown in inches and (millimeters)
adg419 rev. b | page 13 of 16 compliant to jedec standards mo-187-aa 0.80 0.60 0.40 8 0 4 8 1 5 pin 1 0.65 bsc seating plane 0.38 0.22 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.08 3.20 3.00 2.80 5.15 4.90 4.65 0.15 0.00 0 .95 0 .85 0 .75 figure 20. 8-lead mini small outline package [msop] (rm-8) dimensions shown in millimeters controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-a a 012407-a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 figure 21. 8-lead standard small outline package [soic_n] narrow body (r-8) dimensions shown in millimeters and (inches) ordering guide model temperature range package de scription package option branding adg419bn ?40c to +125c 8-lead plasti c dual in-line package [pdip] n-8 adg419bnz 1 ?40c to +125c 8-lead plastic dual in-line package [pdip] n-8 adg419br ?40c to +125c 8-lead standard small outline package [soic_n] r-8 adg419br-reel ?40c to +125c 8-lead standard small outline package [soic_n] r-8 adg419br-reel7 ?40c to +125c 8-lead standard small outline package [soic_n] r-8 adg419brz 1 ?40c to +125c 8-lead standard small outline package [soic_n] r-8 adg419brz-reel 1 ?40c to +125c 8-lead standard small outline package [soic_n] r-8 adg419brz-reel7 1 ?40c to +125c 8-lead standard small outline package [soic_n] r-8 adg419brm ?40c to +125c 8-lead mini small outline package [msop] rm-8 sbb adg419brm-reel ?40c to +125c 8-lead mini small outline package [msop] rm-8 sbb adg419brm-reel7 ?40c to +125c 8-lead mi ni small outline package [msop] rm-8 sbb adg419brmz 1 ?40c to +125c 8-lead mini small outline package [msop] rm-8 sbb# adg419brmz-reel 1 ?40c to +125c 8-lead mini small outline package [msop] rm-8 sbb# adg419brmz-reel7 1 ?40c to +125c 8-lead mini small outline package [msop] rm-8 sbb# adg419tq ?55c to +125c 8-lead ceramic dual in-line package [cerdip] q-8 1 z = rohs compliant part, # denotes that rohs compliant part is top or bottom marked.
adg419 rev. b | page 14 of 16 notes
adg419 rev. b | page 15 of 16 notes
adg419 rev. b | page 16 of 16 notes ?2009 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d07850-0-8/09(b)


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